Verification Staff Engineer - Analog Mixed-Signal

Principal Accountabilities: 

• Execute and own assigned design verification activities that support first-pass silicon success and confirm compliance with performance, power, and schedule requirements.
• Own or contribute to analog and mixed-signal verification of integrated circuits or subsystems.
• Collaborate with AMS DV team members and local contract DV resources on assigned verification activities.
• Contribute to verification strategies for mixed-signal IPs and implement verification IP using object-oriented programming principles and methodologies, including UVM.
• Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.
• Develop efficient, reusable state-of-the-art verification environments and testbench structures.
• Participate in technical reviews with analog and digital design, systems, test, validation, and verification teams.
• Able to debug the RTL for design intent and interface with cross-functional teams and collaboration in all verification related activities.
• Provide technical guidance and support to verification team members within assigned areas of expertise.
 

Key Performance Measures: 

• Deliver high-quality verification plans, environments, tests, checkers, and coverage within agreed project schedules.
• Identify verification risks, communicate issues promptly, and contribute to effective mitigation plans.
• Achieve verification completeness against approved specifications and coverage goals.
• Develop reusable verification components and improve verification efficiency.
• Provide clear technical documentation and share relevant knowledge with the verification team.
• Collaborate effectively with design, systems, test, validation, and other verification engineers.
• Demonstrate the Spirit of Renesas in all aspects of work.

Function: Engineering
Experience Level: Mid-Senior Level