Staff Mask Design Engineer at Renesas Electronics | Job-Scouts.com

Staff Mask Design Engineer

Renesas Electronics
full-time lead Chandler, AZ, United States · More jobs in Chandler, Arizona, United States
This position is sourced from Renesas Electronics's career page . Apply through Job-Scouts to track your application status.

Job Description

Job Summary:

We are looking for an experienced Staff Mask Design Engineer to join a highly skilled layout organization working on Analog and Mixed-Signal ICs for Automotive applications. The role involves defining, developing, and delivering high-quality, manufacturable IC layouts using industry-standard technologies and tools.

The successful candidate will contribute at block and Chip top level, lead layout activities, collaborate closely with design and cross-functional teams, and ensure robust physical implementation that meets performance, reliability, and quality requirements.

Job Purpose:

The purpose of this role is to deliver robust, high-quality physical layouts for complex analog and mixed-signal ICs, ensuring manufacturability, reliability, and on-time delivery, while contributing to layout methodology, team capability, and continuous improvement.

Key Responsibilities:

As a Staff Mask Design Engineer, you will be responsible for:

· Implementing physical layouts for Automotive Business Line products at IP, block, and/or Chip Top level.

· Driving and delivering floorplanning activities for blocks and top-level designs.

· Participating in power supply strategy definition and signal distribution between blocks.

· Delivering analog and mixed-signal layout blocks and contributing to top-level floorplan strategy.

· Applying state-of-the-art layout techniques for device matching, parasitic reduction, ESD protection, latch-up prevention, and yield optimization.

· Executing and signing off physical verification flows, including DRC, LVS, ERC, DFM, and parasitic extraction (PEX).

· Working according to Analog-on-Top and Mixed-Signal-on-Top layout methodologies.

· Attending relevant project and design reviews, reporting progress, risks, and schedule impacts.

· Collaborating closely with design, verification, CAD, and technology teams to minimize rework and resolve physical implementation issues.

· Identifying root causes and proposing solutions for issues observed during first silicon or prototype evaluation.

· Contributing to design-for-quality, ensuring layouts are verified, validated, and suitable for long-term reliability and zero-defect goals.

· Leading layout team activities, including task planning, execution, and knowledge sharing.

· Participating in and contributing to training activities, technical documentation, and layout guidelines.

· Taking a proactive role in personal development, continuous learning, and methodology improvement.

Requirements

Function: Engineering
Experience Level: Mid-Senior Level

Location

Chandler, AZ, United States
View on Google Maps

Similar open positions