Senior PCB Design Engineer

Who You’ll Work With

Working closely with cross-functional teams including Hardware Design, Signal Integrity (SI), Power Integrity (PI), Mechanical Engineering, Thermal Engineering, and Manufacturing, our engineers innovate on system architectures and ultra-high-speed PCB designs to deliver state-of- the-art networking platforms.

What You'll Do

Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in enterprise campuses, hyperscale datacenters, and next-generation AI clusters. The team is responsible for end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments — including optical interface platforms up to 800G and 1.6T.

Core Responsibilities

 High-Speed Layout & Routing

• Implement complex routing for advanced interfaces such as 112G/224G SerDes, PCIe Gen 5/6, DDR4/5/6

• Design and route high-speed differential pairs with tight skew and impedance control

• Execute dense BGA fan-out for high-pin-count ASICs and FPGAs

Optical Transceiver PCB Layout (800G / 1.6T)

• Design and layout boards supporting high-bandwidth optical transceivers (QSFP-DD, OSFP, OSFP-XD or equivalent)

• Route 112G / 224G PAM4 electrical channels between switch ASICs and optical modules

• Define insertion loss budgets and coordinate with SI engineers to meet IEEE compliance requirements

• Optimize breakout routing beneath high-density optical cages

• Implement via stub mitigation strategies including backdrilling for ultra-high-speed signal paths

• Manage ground reference continuity, EMI control, and return path integrity near optical connectors

• Consider thermal dissipation (20W–30W+ modules) in layout planning

• Impedance Control & Signal Integrity

• Design advanced multi-layer stack-ups (20–30+ layers)

• Calculate impedance profiles and ensure low-reflection, low-crosstalk performance

• Collaborate with SI teams on channel modeling and pre-/post-layout simulations

• Power Integrity (PI) Optimization

• Design robust Power Distribution Networks (PDNs) for high-current ASICs

• Layout multi-phase DC/DC converters for high transient loads

• Strategically place decoupling capacitors to ensure wideband impedance stability

• Thermal & Mechanical Coordination

• Integrate thermal vias, heat sink attachments, and high-conductivity materials

• Coordinate mechanical constraints such as enclosure, airflow, and structural limitations

• Ensure proper placement and structural integration of optical cages

• Advanced Fabrication Deliverables

• Generate comprehensive manufacturing packages (Gerber, ODB++, IPC-2581)

• Define backdrilling parameters and impedance specifications

• Ensure compliance with DFM, DFA, and DFT requirements

• Support boards through fabrication, assembly, and production ramp

• Library & Feasibility Ownership

• Create and maintain high-density component footprints (e.g., large BGAs, optical module connectors)

• Participate in new product feasibility studies

• Develop detailed routing guidelines and work packages for layout partners

• Review external placement and routing work to ensure quality and schedule adherence

Department: Hardware Engineering
Function: Engineering
Experience Level: Mid-Senior Level