Senior Principal Engineer- Digital Design
Job Description
Job Summary:
We are seeking an experienced Senior Principal Engineer - Digital Design to lead the micro-architecture, design, and execution of next-generation UA Link Switch solutions within the Memory Interface Division (MID). The ideal candidate will bring deep expertise in high-speed digital system design and SoC development, with a proven track record delivering complex silicon products from architecture through production.
This role requires strong technical leadership in defining and implementing scalable switching and interconnect architectures that enable high-bandwidth, low-latency connectivity for AI, HPC, and memory-centric systems.
Key Responsibilities:
• Lead digital architecture and design activities for UA Link Switch products.
• Define and drive microarchitecture, RTL design, integration, and performance optimization of high-speed switching fabrics and interconnect subsystems.
• Collaborate with architecture, verification, firmware, physical design, signal integrity, and system teams to ensure successful product execution.
• Drive end-to-end development from requirements definition through silicon bring-up and product qualification.
• Provide technical leadership across multiple engineering teams and mentor senior engineers.
• Analyze performance, power, area, and scalability trade-offs to meet aggressive product goals.
• Participate in architectural reviews, design audits, and technical roadmap planning.
• Work closely with ecosystem and standards teams to align product implementation with evolving industry standards.
Requirements
Function: Engineering
Experience Level: Mid-Senior Level